Workshop Description
Hyperscale data centre networks handle millions of TLS terminations per second at the edge, encrypt inter-DC traffic over MACsec and IPsec tunnels, and authenticate routing announcements via BGP sessions. Each of these layers uses classical cryptography that a cryptographically relevant quantum computer would break. The migration challenge is that these systems operate at line rate with extremely tight latency budgets, and PQC algorithms impose measurably larger keys, certificates, and handshake computations.
This workshop works through that migration layer by layer. Participants examine TLS 1.3 hybrid key exchange performance at scale on production load balancers (F5, NGINX, HAProxy), MACsec PQC key agreement on switch ASICs, IPsec IKEv2 PQC on VPN concentrators, and BGP authentication with RPKI post-quantum signatures. The session includes concrete performance data for ML-KEM and ML-DSA on SmartNIC and DPU hardware (NVIDIA BlueField, Intel IPU, AMD Pensando) and covers DPDK-accelerated PQC for scenarios where software-based cryptography cannot meet throughput requirements. Migration sequencing starts at the internet-facing edge and works inward, with rollback procedures for each network segment.
What participants cover
- TLS termination migration: hybrid TLS 1.3 (ML-KEM + X25519) handshake overhead at 100,000+ connections/second, certificate chain size impact, and phased ingress deployment
- Inter-DC WAN encryption: MACsec PQC key agreement on IEEE 802.1AE switch ASICs, IPsec IKEv2 PQC throughput benchmarks, and optical transport layer 1 encryption readiness
- Routing security: BGP TCP-AO with ML-DSA, RPKI post-quantum ROA signatures, and DNSSEC PQC zone signing for authoritative DNS
- Hardware acceleration: DPDK-accelerated PQC on SmartNICs and DPUs, FPGA-based offload for 100/400 GbE, and CPU cycle budgets without hardware offload
- Compliance: NIST FIPS 203/204/205, CNSA 2.0, and CSA CCM v4 requirements for data centre network infrastructure
- Migration sequencing: internet-facing TLS first, then inter-DC WAN, then control plane, then internal east-west. Rollback procedures for each phase.